The present invention relates to a method for forming conductor layers on substrates used to mount LSIs and the like thereon and a method for fabricating multilayer substrates.
In a conventional method for fabricating multilayer substrates, a metal underlayer 2 which can be used as a plating electrode is formed over the entire upper surface of a substrate 1 as shown in FIG. 6(a), for example. Over the upper surface of the metal underlayer 2, resist 3 is formed as grooves having desired conductor pattern shapes as shown in FIG. 6(b).
Thereafter, electroplating 4 is performed by using the above described exposed metal underlayer 2 as the electrode, and the grooves formed by the above described a resist 3 are selectively filled with conductors as shown in FIG. 6(c). At this time, through-holes which are not illustrated are also formed in the same way.
Subsequently, the resist 3 is removed to form conductors 5 as shown in FIG. 6(d) and portions of the above described metal underlayer 2 which are not adjoining the conductors 5 are removed as shown in FIG. 6(e). After an insulation layer 6 has been formed over the entire upper surface of the substrate 1 so as to wrap the above described conductors 5 therein as shown in FIG. 6(f), the upper surfaces of the conductors 5 are exposed as shown in FIG. 6(g) by using a method such as grinding and the surface of the insulation layer 6 is ground to form a flat plane. Thereafter, the above-described steps are repeated to fabricate a multilayer substrate. Such a fabrication method is described in Moriya et al. "High-density Multilayer Interconnection with Photo sensitive Polyimide Dielectric and Electroplating Conductor" in Proceedings of the 34th ECC "Electronic Component Conference", pp. 82 to 87, 1984, for example.
The above-described conventional technique thus needs the steps of selective plating, removing resists, removing the metal underlayer, forming the insulation layer over the entire surface, and grinding the surface to expose the conductor metal and make the surface of the insulation layer flat.
As a result, a large number of steps are required and it is difficult to work the substrate to produce a flat surface because of the warp of the substrate and the like. Further, unevenness of the flatly ground surface is reflected in nonuniformity of the conductor resistance.
In the case of the prior art, conductors can be disposed with high density when the conductor pattern is approximately 5 .mu.m in thickness. When the conductor pattern having a thickness of 20 .mu.m, for example, is to be formed with high density, the wall faces of the conductor pattern are tapered to have a shape as a result of etching. Especially, it is difficult to dispose conductors having a high aspect ratio (where aspect ratio=the height of the conductor layer/the width thereof) with narrow conductor gaps and with high density.